FPGA Based Efficient Cholesky Decomposition for Solving Least Square Problem

The paper presents FPGA based design & implementation of Cholesky Decomposition for matrix calculation to solve least square problem. The Cholesky decomposition has no pivoting but the factorization is stable. It also has an advantage that instead of two matrices, only one matrix multiplied by itself. Hence it requires two times less operation. The Cholesky decomposition has been designed & simulated using DSP tool & it has been synthesized using Xilinx synthesis tool on Virtex 5 XCVLX330 FPGA. The existing LUTs of target FPGA have been optimally utilized to reduce the area consumption & to enhance the speed. It has been observed from the synthesis results that proposed design is capable of reducing slices by 73.55% and LUTs by 60%. An improvement of 3.40% in speed is also achieved as compared to existing design. Index Terms — Cholesky Decomposition, FPGA, LU Decomposition, Matrix factorization.